1. Field of the Invention
The present invention is related to a process for fabricating a SOI (Semiconductor On Insulator) type semiconductor device, and more particularly to a process for fabricating monocrystalline silicon islands embedded in a substrate of insulator using a polycrystalline silicon recrystallization technique which employs an energy beam. The present invention is intended to simplify the process to prepare a substrate used for SOI structured devices.
2. Description of the Prior Art
There has been an increased demand for SOI type semiconductor devices or dielectrically isolated integrated circuits (IC), which isolate circuit elements (such as transistors and diodes) from each other by insulating material, due to the advantages of low stray capacitance and high breakdown voltage. The substrate used for fabricating such devices has a structure in which single crystal semiconductors are embedded in the substrate like islands and surrounded at their peripheries and bottoms by an insulating material.
Recently, a technique for recrystallizing polycrystalline silicon (polysilicon) by irradiating an energy beam (such as a laser beam) has been developed. This technique is starting to be applied in the fabrication of SOI types devices. Further details of this technology are disclosed in, for example, Applied Physics Letter 40(5), Mar. 1, 1982: "Recrystallization of Si on Amorphous Substrates by Doughnut-shaped CW Ar Laser Beam" by S. Kawamura et al.; and IEEE ED Letters, Vol. EDL-4, No. 10, October 1983: "Three-Dimensional CMOS IC's Fabricated by Using Beam Recrystallization" by S. Kawamura and N. Sasaki et al.
To clarify the advantages of the present invention over the prior art, a prior process for preparing insulated substrates, as illustrated in FIG. 1, will be described briefly. FIG. 1 is a schematic partial cross-sectional view of the substrate, illustrating the steps in the fabrication process. A silicon dioxide (SiO.sub.2) film 2 of 0.5 .mu.m thickness is grown on a silicon substrate 1 and is patterned as shown in FIG. 1(a). The size and position of each film pattern 2 correspond to the size and position of the isolated regions which are to be grown later. The film 2 is patterned by conventional photolithographic and etching processes.
Next, a polysilicon layer 3, having a thickness of 0.8-1.0 .mu.m, is grown over the entire surface of the substrate (FIG. 1b).
As illustrated in FIG. 1(c), the surface of the substrate is irradiated using a laser beam 4. The irradiation is first performed on a portion of the substrate where the pattern 2 is not present. As a result, the portion of the polysilicon layer 3 irradiated by the laser beam 4, is melted and recrystallized to form a single crystal of silicon having a crystal orientation which is similar to that of the substrate. As the laser beam 4 is moved gradually to the right in the figure (FIG. 1(c)), the single crystal silicon grows to the right with the shift of the beam. Finally, the polysilicon layer 3 covering the entire surface of the substrate is converted to a single crystal silicon layer 5 as shown in FIG. 1(d). Such growth of a single crystal is referred to as lateral epitaxial growth, and is disclosed in, for example, ECS Meeting Montreal, Canada, May 1982, "Laser-Induced Lateral Epitaxial Growth of Si over SiO.sub.2 " by S. Kawamura et al.
Next, the portion of the single crystal silicon layer 5 over the pattern 2 is coated by a protective film (for example, silicon nitride (Si.sub.3 N.sub.4) film) (not shown), and the substrate is oxidized. As a result, as illustrated in FIG. 1(e), the exposed portion of the single crystal silicon layer 5 (i.e., the portion not covered by the protective film) is converted to a SiO.sub.2 film 6, and an island-like single crystal silicon portion 5a is formed, which is surrounded by SiO.sub.2.
A substrate prepared in the manner described above is used for fabricating various types of devices such as complementary high voltage devices, and has its own advantages. However, when the substrate is used for certain applications (e.g., in bipolar devices), it is necessary to prepare a buried layer in the substrate, as in ordinary bipolar devices. Further, in some high voltage applications, the crystallization at the boundary portion of the single crystal silicon island 5a is imperfect. Therefore, there has been a need in the art for some improvement or expansion of the prior art process (for example, U.S. patent application Ser. No. 604,719, filed Apr. 27, 1984, now U.S. Pat. No. 4,543,133 by R. Mukai et al.) to overcome such problems.